Tuesday, 25 February 2020

Intel Recruitment 2020 For Freshers As Graduate Intern Technical | Bangalore

Intel Recruitment 2020 For Freshers As Graduate Intern Technical: Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, in Silicon Valley.




Candidates who are freshers of 2020 passed outs looking to get software job to settle in software field, so they can choose Intel company is one of the option to build future. Candidates are eligible of educational qualification can apply. It can give best salary. For more jobs you can regularly visit our site www.jobmela4u.com.

Intel Recruitment 2020 For Freshers As Graduate Intern Technical | Bangalore

Company: Intel
Job Designation : Graduate Intern Technical
Job Location : Bangalore
Salary : Best In Industry
Experience : Freshers
Education Qualification : M.E/M.Tech/MS
Website : www.intel.in

Job Description

Assist design unit owner in Register Transfer Level (RTL) modeling & functional validation. 
Use EDA tools extensively to simulate logic behavior and circuit performance and direction of physical design for next generation, deep sub-micron embedded circuit solutions. Verify the circuit behavior against the original simulation model and first silicon.
Define VLSI Structural Design methodology and developing design flows. Implement structural physical designs, such as synthesis, floor planning, power-grid and clock tree designs, timing budgeting and closure, place and route, RC-extraction and integration. Verify structural physical designs, such as functional equivalency, timing/performance, noise, layout design rules, reliability and power.
Develop Analog IP on next generation deep submicron process for the Intel's SOC, perform tasks related to Very-large-scale integration (VLSI) complementary metal-oxide-semiconductor (CMOS) IC design, Solid state physics and physical layout. Such tasks may include: Circuit design of high speed clocking related circuits [phase-locked loop (PLL), delay-locked loop (DLL), bandgap] or high voltage input/output (IO) [double data rate (DDR)/LPDDR, General-purpose input/output (GPIO), OPIO].
Responsible for Integration of Third party IPs -- Synthesis, functional and/or timing convergence, and pre and post-si debug of IPs developed by various external vendors as well as within the company. Handling of signals crossing power planes and clock domains, industry standard protocols including hardware and software details dealing with Memory (LPDDR), storage (eMMC, SATA, UFS), peripherals (PCIe, USB), and MIPI interfaces in SOC devices. System integration dealing with Si/ Platform/ FW/ MW/ drivers/ OS/ Apps on Android & Windows-based tablets and phones

Required Skills:
Familiarity with Very Large Scale Integration (VLSI) Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design
Well versed in UNIX*, C programming and relevant Computer Aided Design (CAD) tools


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